Whenever data is to be transmitted from one system to another, even if those systems operate at the same frequency, the phase of such signals must be synchronized. Typically, a phase locked loop circuit is used to synchronize the phase of those signals. An example of a phase locking arrangement is disclosed in U.S. Pat. No. 4,569,063, "A Digital Phase Locking Arrangement For Synchronizing Digital Span Data". Other related inventions are disclosed in U.S. Pat. Nos. 4,531,210, "A Digital Span Reframing Circuit"; and 4,598,268, "A Digital Span Conversion Circuit". However, it is the object of the present invention to provide a novel digital arrangement for synchronizing the phase of the clock and frame signals of two different systems between which TDM data is transmitted.